LOGIC DESIGN
MSI logic circuits
Memory
ADC / DAC
Logic family
MICROCONTROLLER
Content
Encoder / Decoder
Multiplexer /
Demultiplexer
Data busing
What is an encoder / decoder ?
Code A
N inputs
Encoder /
Decoder
Code B
M outputs
1 of 2N
Decoder
N inputs
2N outputs
—  Inputs represent a binary number
—  Outputs: activate only one output corresponding
—  11111110 11111101 11111011 11110111
1-of-8 (3-to-8) decoder
C
B
A
O7
O6
O5
O4
O3
O2
O1
O0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
(MSB)
1-of-8 decoder IC (74138)
Exercises – Output ?
0 0 0
0 0 0
Exercises – Output ?
0 0 1
0 1 0
7442 IC (4-to-10 decoder)
All of outputs are deactivated
if an invalid input is applied
(1010 à 1111)
Application example
0-15
counter
Provide timing and sequencing operations
BCD-to-7-segment Decoder/Driver
—  Form the decimal characters 0 à 9
—  Each segment is a LED
Exercises
—  Determines outputs for each case (led bright if
output is 1)
— Inputs DCBA = 1001
— Inputs DCBA = 0110
— Inputs DCBA = 0011
— Inputs DCBA = 0000
—  D is the most significant bit
Encoder
—  The opposite of decoding process
—  Depend on the context, terms encoder and decoder
are interchangeable
—  2N-line-to-N-line encoder
—  2N inputs
—  Only one input is activated at a given time
—  Produces a N-bit binary code
8-to-3 encoder
A7
A6
A5
A4
A3
A2
A1
A0
O2
O1
O0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
1
0
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
1
8-to-3 line encoder
Some inputs are activated?
74147 Decimal-to-BCD Priority
Encoder
—  More than one input is activated, output code respond to
the highest-numbered input
—  Exp: A6, A2, A0 are activated à output code is 110 (6)
Exercises
—  Determine outputs of 74147 if A9-A0 inputs are
— 1110111111
— All high except A7, A5, A3
— All low except A9, A1, A0
Example – Switch encoder
Example
—  3 groups
—  Each group stores
code of pressed key
Magnitude comparator
—  Compare two input binary quantities
—  Generate outputs to indicate which one is greater
7485 truth table
8-bit magnitude comparator
—  Compare high-nipple first
—  If equal: compare low-nipple
12, 16 … bit comparator ?
Exercise
—  Describe operation of the 8-bit comparator for the
following cases
— A7A6A5A4A3A2A1A0
= 10101111
= 10110001
— A7A6A5A4A3A2A1A0
= 10101111
= 10101111
— A7A6A5A4A3A2A1A0
= 10101111
= 10101001
B7B6B5B4B3B2B1B0
B7B6B5B4B3B2B1B0
B7B6B5B4B3B2B1B0
Application example
74138 circuit
7446/7447 BCD-to-7-segment
decoder
7446/7447 truth table
Code converter
—  Change data presented in one type of binary code
to another type of binary code
—  BCD-to-7-segment
—  BCD to binary
—  Binary to BCD
—  Binary to Gray code
—  Gray code to binary
—  …
Problems 1
5 inputs
74138
74138
74138
5-to-32 decoder
74138
Implement
5-to-32 decoder
from four 74138s
.
.
.
32 outputs
Problem 2
Implement BCD to 7-segment by logic gates
Problem 3
Implement the comparator by logic gates
Content
Encoder /
Decoder
Multiplexer /
Demultiplexer
Data busing
Multiplexers (MUX - Data Selectors)
—  Select one inputs to pass
on to the output
—  Desired input is controlled by
SELECT inputs
Two-input multiplexer
S
I1
I0
Z
0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1 1
0
1
1
1
1
Z = I0S’ + I1S
Four-input multiplexer
Eight-input multiplexer
Sixteen-input multiplexer
Quad Two-Input MUX (74157)
Application – Data routing
select = 0
select = 1
Applications – Logic function
generation
—  Select :
input variables
—  Data : connect 0 or 1 (based on truth table)
Demultiplexers (Data distributor)
— Revert of MUX
1-to-4 demultiplexer
I
1-to-4
DEMUX
O3
S1
S0
I
O3
O2
O1
O0
O2
0
0
0
0
0
0
0
O1
0
0
1
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
O0
S1 S0
1-to-8 demultiplexer
74138 as DEMUX
Application – Synchronous data
transmission
Waveform
Real application examples
Example – Control system
Problem 4
Implement the 74151 by logic gates
Content
Encoder /
Decoder
Multiplexer /
Demultiplexer
Data busing
Bus ?
Bus ?
—  Common connecting lines for data transferring
—  Many devices connect their inputs/outputs
DDRAM
RDRAM
CMOS
Data bus
CPU
CHIPSET
Open collector
Example
Signal sequence
—  t1: reg. A outputs are enabled
—  t2: reg. C inputs data
—  t3: reg. A outputs are disabled,
data bus return to Hi-Z state
Bus representation
Bidirectional busing
74173 circuit
er
d
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d
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N
f
o
1
✓
nt
e
m
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7
✓  BCD to
tor
ra
✓  Compa
er
x
e
l
p
i
t
l
u
m
r/de
e
x
e
l
p
i
t
l
u
✓  M
sing
Data bu
✓
Review questions
—  Can more than one decoder output be active at one
time?
—  What is the function of a decoder’s enable input?
—  Which LED segments will be on for a 7-segment
decoder input of 1001?
—  How does a priority encoder differ from an ordinary
encoder?
—  What are the functions of a multiplexer ?
—  What are some major applications of a multiplexer?
Problems
—  1 3 4 5 8
—  13 14 15 16*
—  27 29 31* (33 34)
—  35* 36* 37* 38* (all students)
—  39 41 43 44
—  56 57* 58 62*
* important problem
Examiner
—  Each group must solve all the problems
—  Write down the problems and solutions
—  Other group will comment