LAB 4: DIGITAL-TO-ANALOG CONVERSION
Muhammed Smidi and Hemant Jagtap
EGR2400
July 18, 2023
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1. Abstract
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The main aim of the experiment is to provide students with a hands-on learning opportunity
utilizing MATLAB and PSPICE, along with equipment such as oscilloscopes and multimeters, to
gain an understanding of digital-to-analog conversion. This process involves the conversion of
digital input, represented in binary strings, into analog output signals by manipulating voltage
levels. By implementing an 8-bit counter stimulator in Active-HDL, it was observed that the
oscilloscope accurately captured the waveform, even without using a clock divider, despite the
high 50 MHz frequency, which surpasses the human eye's processing capabilities. This exercise
helps participants gain insights into mixed signals, where digital and analog systems interact.
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Afterward, a resistor network was assembled on a basys-2 breadboard to reproduce the pre-lab
PSpice simulation. Through testing with an oscilloscope, it was confirmed that the results
matched the pre-lab findings. The significance of digital-to-analog conversion, as well as analogto-digital conversion, lies in their broad real-world applications. Binary digital signals in the form
of zeroes and ones may lack meaning for humans, but this conversion process enables these
signals to be decoded into observable outputs such as audio, video, and mechanical motion.
This understanding fosters a comprehensive grasp of circuitry and its underlying mechanisms.
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2. Introduction
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Digital-to-analog conversion (DAC) and its reciprocal process, analog-to-digital conversion
(ADC), are of paramount importance in the realm of modern technology. The ability of a DAC to
decode digital impulse inputs into comprehensible analog outputs is a cornerstone of our digital
era. While binary values may appear cryptic to human perception, their transformation through
a DAC unveils observable analog signals, enabling us to interpret meaningful insights from the
data. A fundamental distinction lies between digital and analog signals: digital signals adopt a
binary representation conveyed through discrete bits, whereas analog signals materialize as
continuous voltage outputs. A profound implication of this contrast is the varying infrastructure
required for their transmission. Digital signals necessitate multiple wires to encapsulate the
individual bits, while their analog counterparts convey all information through a single wire,
simplifying their handling and transmission.
The experimental implementation of an 8-bit counter through Active-HDL software revealed
much valuable insight. Operating under the pulsing of a 50 MHz clock, the simulation elicited
values of 1 at 0 ns and 0 at 5 ns, compellingly setting the stage for further analyses. The
meticulous observation of timing diagrams proved indispensable in determining the period for
each crucial signal, namely Clk and q [7:0]. Once the periods were determined, the associated
frequencies were easily calculable using a well-crafted equation, where the index 'y' pertained
to the bit under consideration, and Mclk symbolized the all-encompassing clock frequency of
50MHz. Interestingly, it was revealed that even in the absence of explicit period knowledge,
frequency computation could still be achieved through an alternative equation, unraveling the
inner workings of the digital system.
Moving on to Part B, the lab proceeded with synthesizing and implementing the 8-bit counter
on the basys-2 board. This involved connecting output pins 1 and 2 on the ja header to channels
1 and 2 on the oscilloscope. To ensure accuracy, a wire was inserted into the GND slot of the ja
header as a reference point. The oscilloscope was precisely adjusted to trigger on the edge of
the channel 1 signal, revealing detailed wave patterns for examination. Analyzing the data
showed an expected similarity in frequency and period between q [7] and q [6], leading to
insightful discussions in the following section.
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EGR 2400- Lab 4: Digital-to-Analog Conversion
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Finally, Part C of the experiment entailed the assembly of a network comprising eight resistors,
arranged with a combination of five 2kΩ and three 1kΩ resistors. The interconnection of q [7:4]
pins from [1:4] on the ja header to inputs B3:B0 on the circuit displayed a compelling coherence
upon the entire setup. Channels 1 and 2 of the oscilloscope emerged as veritable detectives,
diligently capturing the waveform emanating from the resistor network, offering a grand
synthesis of the 4-bit DAC, the carefully crafted resistor network, and the oscilloscope,
providing a blend of captivating wave patterns to carefully examine.
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Figure 1: Matlab Coding and Pspice Results
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3. Results and Discussion
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In Part A, we designed an 8-bit counter block diagram using ActiveHDL, as illustrated in Figure 1.
Subsequently, after configuring the necessary parameters, we obtained a timing diagram
displaying the resulting signals, shown in Figure 2. To determine the associated period in
nanoseconds, we utilized the measurement tool. The corresponding frequency in megahertz
was then calculated by taking the reciprocal of the period. The outcomes for the clk and 8-bit
counter can be observed in the figures.
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Figure 2: 8-bit-coounter block diagram
EGR 2400- Lab 4: Digital-to-Analog Conversion
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The equation used to find the output frequencies using a clock divider for an R-2R network is,
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𝑓𝑜𝑢𝑡 = 2𝑦+1 𝑚𝑐𝑙𝑘
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𝑃𝑒𝑟𝑖𝑜𝑑 = 𝑓
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eqn (1)
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eqn (2)
Here, output Frequency is the desired frequency at the output of the R2R network. “Mclk” is
the frequency of the input clock signal. “y” is the number of bits in the R2R network,
representing the number of bits in the counter or the clock divider. Using the formula, we get
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eqn (3)
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eqn (4)
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eqn (5)
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𝑞(0) = 20+1 ∗ 50 = 25𝑀𝐻𝑧
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𝑞(3) = 23+1 ∗ 50 = 3.125𝑀𝐻𝑧
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𝑞(7) = 27+1 ∗ 50 = 0.1953𝑀𝐻𝑧
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From the calculations using Equation 1 & Equation 2, calculated frequencies are similar to the
frequencies that validate the measured results in Table (1). The minimum length for the
simulation to fully simulate the counter was found out to be 5.12us in equation (6) which
confirmed 8us to be enough for the simulation.
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𝑇𝑜𝑡𝑎𝑙 = 256(𝑇) = 256 ∗ 50∗106 = 5.12𝐸 − 6 = 5.12𝜇𝑠
eqn (6)
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Signal
Clk
q [0]
q [1]
q [2]
q [3]
q [4]
q [5]
q [6]
q [7]
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Measured
Period (ns)
Calculated frequency
(MHz)
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12.5
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6.25
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3.125
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1.5625
1280
0.7812
2560
0.3906
5120
0.1953
Table 1: Measured Signals and Frequency from simulation
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EGR 2400- Lab 4: Digital-to-Analog Conversion
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Figure 3: Timing Diagram
Part B involved the measurement of four signals, which began with the connection of the USB
cable from the Basys2 board, and the download of the Adept program created in Part A. The
oscilloscope probes were then connected to pins 1 and 2 of the header ja on the Basys2 board,
while the ground of the probes was linked to both the ground of header ja and the ground of
the breadboard. Subsequently, the oscilloscope settings were adjusted to trigger on the falling
edge of the channel 1 signal. Following the calibration of the amplitude and time scales, the
measurement function on the oscilloscope was used to measure q (7).
Figure 3 displays the results, indicating that channel 1 had a frequency of 195.50 kHz and a
period of 5.12µs as depicted in figure 3, thereby validating the calculation presented in Table 1.
Similarly, channel 2 was set up to measure q (6). The measured frequency of 390.6 kHz and
period of 2.56µs also confirmed the accuracy of the calculations from Table 1.
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Figure 4: Oscilloscope waveform channel 1 q (7)
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After recording these outcomes, channel 1 was relocated to header ja pin 3, while channel 2
was transferred to header ja pin 4. Subsequently, Channel 2 was calibrated to measure q (4), as
shown in Figure 4. The results from oscilloscope in the form of waveform were similar to the
pspice results when compared to figure (1) & figure (5).
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Figure 5: Oscilloscope waveform channel 2 q (4)
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In Part C of the experiment, an R-2R network was established on a breadboard, depicted in
Figure 7. Before proceeding with the experiment, the resistors themselves underwent
measurements to ensure their accuracy and proper functioning. As shown in Figure 5, a total of
eight resistors were used, with five having a resistance of 2kΩ, and the remaining three having
a resistance of 1kΩ. The color code for the 1kΩ resistors, in the order of increasing bands, was
brown, black, red, with a gold tolerance (5% error). For the 2kΩ resistors, the color coding was
red, black, red, with a gold tolerance band.
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Figure 6: R-2R Network
Figure 7: Pspice Circuit
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4. Conclusion(s)
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In conclusion, the experiment focused on synthesizing and implementing an 8-Bit Counter using
a 50MHz clock as the stimulator. The process involved downloading the file to the Basys 2
board and connecting the outputs q [7:4] to the header ja [1:4]. Through precise utilization of
the oscilloscope, measurements were taken by connecting channel 1 to pin 1 and channel 2 to
pin 2 of the header ja. Further measurements were conducted by relocating the oscilloscope
probes to pin 3 and pin 4, all of which aligned with previous calculations. The investigation
proceeded to create a resistor-to-resistor network, skillfully connecting head ja [1:4] to inputs
B3 to B0 of the network. For detailed analysis, channel 1 from the oscilloscope was linked to the
output V. The resulting waveform from Part C closely resembled the waveform observed in the
pre-lab, affirming the experimental results. The experiment effectively showcased the
functionality of a digital to analog converter, proficiently converting digital impulses into analog
outputs. This process holds significant value in understanding binary values. Moreover, the
conversion of digital signals to analog provides the advantage of transmitting all information
through a single wire, resulting in a simplified system with reduced hardware and connections.
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EGR 2400- Lab 4: Digital-to-Analog Conversion
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